The present invention relates to a semiconductor chip, a semiconductor device, and a battery pack, and to a technology effective for application to, for example, a semiconductor chip and a semiconductor device used in control of a secondary battery.
There has been described in Japanese Patent No. 4,646,284 (Patent Document 1), a technology of providing a bump electrode for source, a bump electrode for drain, and a bump electrode for gate over the same surface of a semiconductor chip formed with trench-type power MOSFETs (Metal Oxide Semiconductor Field Effect Transistors) as shown in FIG. 1 of Patent Document 1.